View TDA8050_2281394.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

d a t a sh eet product speci?cation supersedes data of 1999 jun 21 file under integrated circuits, ic02 1999 dec 14 integrated circuits TDA8050 qpsk transmitter
1999 dec 14 2 philips semiconductors product speci?cation qpsk transmitter TDA8050 features programmable gain pll controlled carrier frequency 3-wire transmission bus 5 v supply voltage. applications qpsk modulation. general description the quadrature phase shift keying (qpsk) transmitter is a monolithic bipolar ic dedicated for quadrature modulation of the i and q signals. it includes: two double-balanced mixers symmetrical voltage controlled oscillator (vco) with 0 to 90 degree signal generation for modulation phase-locked loop (pll) for if frequency control conversion mixer pll for rf frequency control gain controlled output amplifier 3-wire bus and an output buffer. two plls are incorporated, the first pll includes: fixed main divider crystal oscillator and its programmable reference divider phase/frequency detector combined with a fixed charge pump. the second pll includes: divide-by-four preamplifier 12-bit programmable divider crystal oscillator and its programmable reference divider phase/frequency detector combined with a clever charge pump which drives the tuning amplifier, including 9 v output. quick reference data ordering information symbol parameter min. typ. max. unit v cc supply voltage 4.75 5.00 5.25 v f c output centre frequency 5 - 40 mhz v o(max) maximum output level - 55 - dbmv f xtal crystal frequency 1 - 4 mhz f ref(mod) reference frequency for modulator synthesizer - 250 - khz f step frequency step size for convertor synthesizer 50 - 500 khz t amb operating ambient temperature 0 - 70 c type number package name description version TDA8050t so32 plastic small outline package; 32 leads; body width 7.5 mm sot287-1
1999 dec 14 3 philips semiconductors product speci?cation qpsk transmitter TDA8050 this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here inthis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force landscape pages to be ... block diagram handbook, full pagewidth fce181 1/2 90 0 s 27 TDA8050 modulator converter 25 24 28 1 3 2 30 31 rf_out outen buf_out buf_outc 26 avcc1 4 agnd2 18 dvcc 13 dgnd 9 agnd1 32 sw_cap 29 avcc2 8 7 6 5 clk i_in i_inc q_in q_inc 15 14 data 16 en rf_outc rf_in if_filt rf_inc if_filtc fixed main divider dac 3-wire bus tranceiver digital phase comparator digital phase comparator charge pump program- mable charge pump programmable ref divider programmable main divider programmable ref divider 10 12 11 17 22 21 20 19 cp_mod tkamod tkbmod tkaconv osc_in tkbconv tuneconv cp_conv 23 lock fig.1 block diagram.
1999 dec 14 4 philips semiconductors product speci?cation qpsk transmitter TDA8050 pinning symbol pin description outen 1 output enable buf_out 2 output ampli?er balanced output buf_outc 3 output ampli?er balanced output agnd2 4 converter analog ground 2 i_in 5 i balanced input i_inc 6 i balanced input q_in 7 q balanced input q_inc 8 q balanced input agnd1 9 modulator analog ground 1 tkamod 10 modulator vco tank circuit input 2 tkbmod 11 modulator vco tank circuit input 1 cp_mod 12 modulator charge pump output for pll loop ?lter dvcc 13 digital supply voltage clk 14 3-wire bus serial control clock data 15 3-wire bus serial control data input en 16 3-wire bus serial control enable osc_in 17 crystal oscillator input dgnd 18 digital ground cp_conv 19 converter charge pump output for pll loop ?lter tuneconv 20 tuning voltage output for converter vco tkbconv 21 converter vco tank circuit input 1 tkaconv 22 converter vco tank circuit input 2 lock 23 lock detect signal if_filt 24 if balanced output to ?lter if_filtc 25 if balanced output to ?lter avcc1 26 modulator analog supply voltage rf_outc 27 rf balanced output to ?lter rf_out 28 rf balanced output to ?lter avcc2 29 converter analog supply voltage rf_in 30 rf balanced input to programmable ampli?er rf_inc 31 rf balanced input to programmable ampli?er sw_cap 32 switch capacitor fig.2 pin configuration. handbook, halfpage TDA8050 fce182 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 outen buf_out buf_outc agnd2 i_in i_inc q_in q_inc agnd1 tkamod tkbmod cp_mod dvcc clk sw_cap rf_inc rf_in avcc2 rf_outc avcc1 rf_out if_filtc if_filt lock tkaconv tkbconv tuneconv cp_conv data dgnd osc_in en
1999 dec 14 5 philips semiconductors product speci?cation qpsk transmitter TDA8050 functional description the i and q are balanced analog signals at a level of 400 mv (p-p). these are mixed by two double balanced mixers with the output signal generated by a first local oscillator providing the modulated signal. the modulated signal is then filtered by an if filter. this filtered signal together with a signal generated by a second local oscillator is converted by a balanced mixer to produce the qpsk signal. the qpsk signal is amplified by a gain controlled amplifier to a level suitable for transmission. the gain of the controlled amplifier is bus controlled and this amplifier can be disabled when not transmitting to provide signal attenuation. the amplified signal is applied to an on-chip amplifier having two balanced outputs (open collector) linked to two chip resistors (values 150 w ), and 9 v. the balanced outputs are designed to drive a 2 : 1 transformer (siemens v944) with a 75 w load giving an output level of 55 dbmv. the output frequency range of the transmitter is 5 to 40 mhz. the frequency of the first local oscillator operates at twice the frequency (i.e. 280 mhz) fixed by a phase-locked loop (pll) implemented in the circuit. the frequency of the second local oscillator operates in the bandwidth 145 to 180 mhz and programmable due to a pll implemented in the circuit. the vco of both first and second local oscillators requires an external lc tank circuit with two varicap diodes. the data to the pll is loaded in bursts framed by the signal en. programming rising clock edges and their appropriate data bits are ignored until en goes active (low). the internal latches are updated with the latest programming data when en returns inactive (high). the last 14 bits are stored in the programming register. no check is made on the number of clock pulses received during the time programming is enabled. a wrong active clock edge will be generated causing a shift of data bits, if en goes high while clk is still low. at power up, en should be high. the lock detector output lock is high when both plls are in lock. the main divider ratio and the reference divider ratios are provided via the serial bus. a control register controls the digital-to-analog converter (dac), the output amplifier and the charge pump currents (tables 1, 2 and 3). limiting values in accordance with the absolute maximum rating system (iec 134). symbol parameter min. max. unit v cc supply voltage - 0.3 +6.0 v t sc short-circuit time (every pin to v cc or gnd) - 10 s v max voltage on all pins except buf_out, buf_outc and tuneconv - 0.3 v cc v v o(tune) output tuning voltage - 0.3 +30 v v o(buf) output buffer voltage on pins buf_out and buf_outc - 10 v p tot maximum power dissipation - 800 mw t amb operating ambient temperature 0 70 c t stg storage temperature - 40 +150 c t j(max) junction temperature - 150 c
1999 dec 14 6 philips semiconductors product speci?cation qpsk transmitter TDA8050 thermal characteristics handling human body model (hbm): the ic pins withstand 2 kv except pins 27 and 28 (1750 v). machine model (mm): the ic pins withstand 100 v. characteristics measured in application circuit (see fig.9) with the following conditions: v cc =5v; t amb =25 c; all ac units are rms values; unless otherwise speci?ed. symbol parameter conditions value unit r th(j-a) thermal resistance from junction to ambient in free air 63 k/w symbol parameter conditions min. typ. max. unit supply v cca(mod) modulator analog supply voltage 4.75 5 5.25 v i cca(mod) modulator analog supply current - 41 - ma v cca(conv) converter analog supply voltage 4.75 5 5.25 v i cca(conv) converter analog supply current - 48 - ma i cc(buf) buffer output supply current - 44 - ma v ccd digital supply voltage 4.75 5 5.25 v i ccd digital supply current - 22 - ma v cc(tune) tuning supply voltage -- 9v quadrature modulator i and q inputs v i(dc) input dc level over the complete range of temperature - 0.5v cc - v v i(p-p) signal input level (balanced) (peak-to-peak value) indicative - 400 500 mv f i(max) i and q maximum input frequency indicative - 10 - mhz z i(dif) differential input impedance - 4.4 - k w b (1db) 1 db ampli?er bandwidth indicative - 10 - mhz m odulator f c output centre frequency -- 140 mhz d a amplitude imbalance see fig.3 -- 1db df phase imbalance -- 2 deg lo (sup) lo suppression see fig.3 -- 28 - dbc z o(dif) differential output impedance - 1.8 - k w m odulator voltage controlled oscillator f osc(mod) oscillation frequency vco -- 280 mhz
1999 dec 14 7 philips semiconductors product speci?cation qpsk transmitter TDA8050 converter output v o output level f i = 30 mhz; v i(dif) = 100 mv at i and q inputs 37.5 40 42.5 dbmv d v o output ?atness f i = 5 to 40 mhz; v i(dif) = 100 mv at i and q inputs -- 2db f c output centre frequency 5 - 40 mhz z o(dif) differential output impedance - 150 -w im3 3rd-order intermodulation distortion see fig.4 --- 35 dbc h 2 2nd-order harmonic of 5 to 40 mhz signal f i = 10 to 80 mhz; v i(dif) = 100 mv at i and q inputs --- 45 dbc h 3 3rd-order harmonic of 5 to 40 mhz signal f i = 15 to 120 mhz; v i(dif) = 100 mv at i and q inputs --- 45 dbc s o mixer spurious outputs of 5 to 40 mhz signal f i = 5 to 40 mhz; v i(dif) = 100 mv at i and q inputs --- 50 dbc converter voltage controlled oscillator f osc(min) minimum oscillation frequency -- 145 mhz f osc(max) maximum oscillation frequency 180 -- mhz programmable gain and output buffer; note 1 z i(dif) differential input impedance - 5.6 - k w d g output level step size -- 2db d buf o output level adjust range v i = 30 dbmv sine wave; 40 mhz at pin rf_in and rf_inc; dac = 0 to 31 32 -- db v o output level - 55 - dbmv d v o output ?atness f i = 5 to 40 mhz; v i = 30 dbmv sine wave; dac = 28 -- 2db v o(enl) output controlled enable low output buffer on -- 0.8 v v o(enh) output controlled enable high output buffer off 2.4 -- v iso disable isolation v i(dif) = 100 mv; v o = 55 dbmv; dac = 28; f i = 40 mhz; oe = 0.5 - 35 -- dbc g (max) maximum gain see fig.5 - 22 - db v o(1db) 1 db compression point see fig.5 60 -- dbmv h 2 2nd-order harmonic of 5 to 40 mhz signal see fig.6 f i =10to40mhz --- 45 dbc f i = 54 to 120 mhz --- 35 dbc symbol parameter conditions min. typ. max. unit
1999 dec 14 8 philips semiconductors product speci?cation qpsk transmitter TDA8050 h 3 3rd-order harmonic of 5 to 40 mhz signal fig.6 f i =15to40mhz --- 45 dbc f i = 54 to 120 mhz --- 35 dbc overall; note 1 f osc phase noise note 2; at 10 khz -- 70 - dbc/hz at 100 khz -- 90 - dbc/hz s o spurious signals of 5 to 40 mhz signal f i = 5 to 40 mhz; v i(dif) = 100 mv at i and q inputs; v o = 30 to 55 dbmv --- 50 dbc iso tot total isolation at i/q mid-range see fig.7 --- 65 dbc c/n carrier to noise ratio at ?nal output at 2 mhz from carrier v i(dif) = 100 mv v o = 35 to 55 dbmv; f i = 26.5 mhz - 113 - dbc/hz crystal oscillator f xtal crystal frequency note 3 1 - 4 mhz z i input impedance f xtal = 4 mhz 600 1200 -w v i(dc) dc input level - 2.9 - v modulator synthesizer f ref(mod) reference frequency - 250 - khz rdr1 reference divider ratio programmable 4 - 16 nd1 ?xed main divider ratio - 1120 - i cp charge-pump current ?xed - 0.30 - ma converter synthesizer f step frequency step size 50 - 500 khz rd2 ?xed reference divider ratio - 2 - rdr2 reference divider ratio programmable see table 4 4 - 160 nd2 ?xed main divider ratio - 4 - ndr2 programmable main divider ratio see table 4 290 - 3600 three wire bus v il low-level input voltage -- 0.8 v v ih high-level input voltage 2.4 -- v lock detect pin v o(lock) output voltage (lock) - 5 - v v o(unlock) output voltage (unlock) - 0.02 - v symbol parameter conditions min. typ. max. unit
1999 dec 14 9 philips semiconductors product speci?cation qpsk transmitter TDA8050 notes 1. all specification points of the output section and the overall circuit are measured after the 2 : 1 transformer (siemens v944) connected with a load of 75 w . 2. overall phase noise converter: i cp = 0.36 ma; f ref = 12.5 khz; v i(diff) = 100 mv; v o(diff) = 100 mv; v o = 55 dbmv; dac = 28; f i = 26.5 mhz. 3. crystal oscillator; the crystal oscillator uses a 4, 2 or 1 mhz crystal in series with a capacitor. the crystal is serial resonant with load a capacitance of 18 to 20 pf. the connection to v cc is preferred but can also be to gnd. notes to the characteristics serial control clock f clk clock frequency - 330 - khz t su input data to clk set-up time see fig.3 - 2 -m s t h(clk) input data to clk hold time see fig.3 - 1 -m s t d(strt) delay to rising clock edge see fig.3 - 3 -m s t d(stp) delay from last clock edge see fig.3 - 3 -m s symbol parameter conditions min. typ. max. unit fig.3 imbalance and lo suppression. the amplitude imbalance and the lo suppression are measured in the spectrum of the signal measured at the output if_filt and ar e defined in the following conditions: measure 1: i input frequency = 500 khz. i input level = 400 mv (p-p) sine wave. unused input as 0 v differential. measure 2: q input frequency = 500 khz. q input level = 400 mv (p-p) sine wave. unused input as 0 v differential. handbook, full pagewidth fce183 lo (sup) measure 2 f i(q) imbalance measure 1 f i(i) frequency if_filt
1999 dec 14 10 philips semiconductors product speci?cation qpsk transmitter TDA8050 3rd-order intermodulation distortion; two tones of 260 mv (p-p) at each i and q input: 2 sine waves with a total rms values of 128 mv give: 90 mv (rms) = 260 mv (p-p) and f 1 = 300 khz, f 2 = 500 khz and f rf = 40 mhz. v av () 400 2 --------- - 10 4 C 20 ------ 128 mv rms () = = 2x 2 128 = x 128 2 --------- - = = fig.4 3rd-order intermodulation distortion in i and q channels (im3). handbook, full pagewidth 500 khz 300 khz i_in rf_out q_in i_inc rf_outc q_inc 50 w 50 w fce184 f (mhz) 39.1 39.5 39.7 39.9 40 40.1 40.3 40.5 40.7
1999 dec 14 11 philips semiconductors product speci?cation qpsk transmitter TDA8050 handbook, full pagewidth 50 w gain (db) v o( - 1 db) v o g max - 1 g max fce185 rf_in buf_out rf_inc buf_outc 150 w 150 w siemens v944 9 v 75 w v o2 fig.5 maximum gain and compression point. dac = 31. f = 26.5 mhz. v i is variable to have a variable output voltage. fig.6 harmonics of output section h2 and h3. dac = 28. f i = 5 to 40 mhz. v i = 200 mv sine wave. v o = 55 dbmv (rms value). handbook, full pagewidth fce186 rf_in buf_out rf_inc buf_outc 150 w 150 w siemens v944 9 v 75 w
1999 dec 14 12 philips semiconductors product speci?cation qpsk transmitter TDA8050 fig.7 isolation total. iso tot =v o1 (db) - v o2 (db). handbook, full pagewidth fce187 i_in buf_out v i(dif) = 100 mv outen = 0 v i_inc q_in q_inc buf_outc dac = 28 150 w 150 w siemens v944 9 v 75 w v i(dif) = 100 mv v o1 i_in buf_out 0 v outen = 5 v i_inc q_in q_inc buf_outc dac = 28 150 w 150 w siemens v944 9 v 75 w 0 v v o2
1999 dec 14 13 philips semiconductors product speci?cation qpsk transmitter TDA8050 application information table 1 data format; note 1 notes 1. x = dont care. 2. mp1 and mp0: modulator reference divider ratio (see table 2). 3. when oen (output enable) is at logic 0, output is disabled, at logic 1 output is enabled. 4. cr2 to cr0: converter synthesizer charge pump current (see table 3). 5. when dac4 to dac0 is at logic 0 minimum gain is programmed, at logic 1 maximum gain is programmed. data address d11 ?rst in d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 ad1 ad0 last in modulator reference divider ratio converter reference divider ratio x x mp1 (2) mp0 (2) r7 r6 r5 r4 r3 r2 r1 r0 0 1 control register x x x oen (3) cr2 (4) cr1 cr0 (4) dac4 (5) dac3 dac2 dac1 dac0 1 0 main divider ratio p11 p10 p9 p8 p7 p6 p5 p4 p3 p2 p1 p0 1 1 handbook, full pagewidth mbl113 clk data en t d(strt) t d(stp) t h(clk) t su t cy fig.8 3-wire bus timing.
1999 dec 14 14 philips semiconductors product speci?cation qpsk transmitter TDA8050 table 2 modulator reference divider ratio table 3 converter synthesizer charge pump current note 1. lock_conv is an internal signal. when at logic 0 converter pll is out-of-lock. when at logic 1 converter pll is in-lock. table 4 converter synthesizer: f comp =f osc /rd table 5 converter synthesizer; nd = 4; f lo =nd ndr f comp = ndr step mp1 mp0 programmed ratio 11 4 10 8 01 16 cr2 cr1 cr0 lock_conv (1) i cp (ma) 00001.2 0001 0.36 0010 0.36 00110.1 010 - 0.1 011 - 0.36 100 - 1.2 f osc \f comp 12.5 khz 25 khz 50 khz 125 khz 1 mhz 80 40 20 8 4 mhz 320 160 80 32 f lo \step 50 khz 100 khz 200 khz 500 khz 145 mhz 2900 1450 725 290 180 mhz 3600 1800 900 360
1999 dec 14 15 philips semiconductors product speci?cation qpsk transmitter TDA8050 handbook, full pagewidth 22 k w 680 w + 9 v + 5 v 27 k w 10 nf 100 nf 18 pf 100 nf 100 nf 100 nf 100 nf 100 pf 330 pf 8.2 pf 820 pf bb132 (2 ) 56 nh 68 nh 140 mhz 10 k w 10 k w 10 k w 22 k w 39 pf 27 pf 47 pf 39 pf TDA8050 mbk982 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 outen buf_out buf_outc agnd2 i_in i_inc q_in q_inc agnd1 tkamod tkbmod cp_mod dvcc clk sw_cap rf_inc rf_in avcc2 rf_outc avcc1 rf_out if_filtc if_filt lock tkaconv tkbconv tuneconv cp_conv data dgnd osc_in 4 mhz en 18 pf 8.2 nf 330 pf 370 pf 10 pf bb133 (2 ) 22 nh 18 k w 100 w 10 k w 10 k w 22 k w 22 k w 15 pf 100 nf 100 nf 100 w 150 w 150 w siemens v944 100 nf 100 nf 15 pf + 5 v 390 nh 390 nh + 5 v + 9 v fig.9 application diagram.
1999 dec 14 16 philips semiconductors product speci?cation qpsk transmitter TDA8050 internal pin configuration symbol pin description dc voltage outen 1 - sw_cap 32 1.7 v buf_out 2 5.8 v buf_outc 3 5.8 v agnd2 4 0 i_in 5 2.5 v i_inc 6 2.5 v 1 32 fce004 2 3 fce005 fce023 4 5 6 fce006
1999 dec 14 17 philips semiconductors product speci?cation qpsk transmitter TDA8050 q_in 7 2.5 v q_inc 8 2.5 v agnd1 9 0 v tkamod 10 3.1 v tkbmod 11 3.1 v cp_mod 12 2.1 v dvcc 13 supply voltage 5 v symbol pin description dc voltage 7 8 fce007 fce008 9 10 11 fce009 12 fce010
1999 dec 14 18 philips semiconductors product speci?cation qpsk transmitter TDA8050 clk 14 - data 1 5 - en 16 - osc_in 17 2.9 v dgnd 18 0 symbol pin description dc voltage 14 fce011 15 fce012 16 fce013 v cc 17 fce014 fce015 18
1999 dec 14 19 philips semiconductors product speci?cation qpsk transmitter TDA8050 cp_conv 19 2.1 v tuneconv 20 v vt tkbconv 21 3.1 v tkaconv 22 3.1 v lock 23 0 v 5v symbol pin description dc voltage v cc down up 19 fce016 20 fce017 21 22 fce018 23 fce019
1999 dec 14 20 philips semiconductors product speci?cation qpsk transmitter TDA8050 if_filt 24 2.1 v if_filtc 25 2.1 v avcc1 26 supply voltage 5 v rf_outc 27 3.7 v rf_out 28 3.7 v avcc2 29 supply voltage 5 v rf_in 30 2.1 v rf_inc 31 2.1 v symbol pin description dc voltage 24 25 fce020 fce021 27 28 30 31 fce022
1999 dec 14 21 philips semiconductors product speci?cation qpsk transmitter TDA8050 package outline unit a max. a 1 a 2 a 3 b p cd (1) e (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec eiaj mm inches 2.65 0.10 0.25 0.01 1.4 0.055 0.3 0.1 2.45 2.25 0.49 0.36 0.27 0.18 20.7 20.3 7.6 7.4 1.27 10.65 10.00 1.2 1.0 0.95 0.55 8 0 o o 0.25 0.1 0.004 0.25 dimensions (inch dimensions are derived from the original mm dimensions) note 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 1.1 0.4 sot287-1 (1) 0.012 0.004 0.096 0.086 0.02 0.01 0.050 0.047 0.039 0.419 0.394 0.30 0.29 0.81 0.80 0.011 0.007 0.037 0.022 0.01 0.01 0.043 0.016 w m b p d h e z e c v m a x a y 32 17 16 1 q a a 1 a 2 l p q detail x l (a ) 3 e pin 1 index 0 5 10 mm scale so32: plastic small outline package; 32 leads; body width 7.5 mm sot287-1 95-01-25 97-05-22
1999 dec 14 22 philips semiconductors product speci?cation qpsk transmitter TDA8050 soldering introduction to soldering surface mount packages this text gives a very brief insight to a complex technology. a more in-depth account of soldering ics can be found in our data handbook ic26; integrated circuit packages (document order number 9398 652 90011). there is no soldering method that is ideal for all surface mount ic packages. wave soldering is not always suitable for surface mount ics, or for printed-circuit boards with high population densities. in these situations reflow soldering is often used. re?ow soldering reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. typical reflow peak temperatures range from 215 to 250 c. the top-surface temperature of the packages should preferable be kept below 230 c. wave soldering conventional single wave soldering is not recommended for surface mount devices (smds) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. to overcome these problems the double-wave soldering method was specifically developed. if wave soldering is used the following conditions must be observed for optimal results: use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. for packages with leads on two sides and a pitch (e): C larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; C smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves at the downstream end. for packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves downstream and at the side corners. during placement and before soldering, the package must be fixed with a droplet of adhesive. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. typical dwell time is 4 seconds at 250 c. a mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. manual soldering fix the component by first soldering two diagonally-opposite end leads. use a low voltage (24 v or less) soldering iron applied to the flat part of the lead. contact time must be limited to 10 seconds at up to 300 c. when using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 c.
1999 dec 14 23 philips semiconductors product speci?cation qpsk transmitter TDA8050 suitability of surface mount ic packages for wave and re?ow soldering methods notes 1. all surface mount (smd) packages are moisture sensitive. depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). for details, refer to the drypack information in the data handbook ic26; integrated circuit packages; section: packing methods . 2. these packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. if wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. the package footprint must incorporate solder thieves downstream and at the side corners. 4. wave soldering is only suitable for lqfp, tqfp and qfp packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. wave soldering is only suitable for ssop and tssop packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. definitions life support applications these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips for any damages resulting from such improper use or sale. package soldering method wave reflow (1) bga, sqfp not suitable suitable hlqfp, hsqfp, hsop, htssop, sms not suitable (2) suitable plcc (3) , so, soj suitable suitable lqfp, qfp, tqfp not recommended (3)(4) suitable ssop, tssop, vso not recommended (5) suitable data sheet status objective speci?cation this data sheet contains target or goal speci?cations for product development. preliminary speci?cation this data sheet contains preliminary data; supplementary data may be published later. product speci?cation this data sheet contains ?nal product speci?cations. limiting values limiting values given are in accordance with the absolute maximum rating system (iec 134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the speci?cation is not implied. exposure to limiting values for extended periods may affect device reliability. application information where application information is given, it is advisory and does not form part of the speci?cation.
? philips electronics n.v. sca all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owne r. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not con vey nor imply any license under patent- or other industrial or intellectual property rights. internet: http://www.semiconductors.philips.com 1999 68 philips semiconductors C a worldwide company for all other countries apply to: philips semiconductors, international marketing & sales communications, building be-p, p.o. box 218, 5600 md eindhoven, the netherlands, fax. +31 40 27 24825 argentina: see south america australia: 3 figtree drive, homebush, nsw 2140, tel. +61 2 9704 8141, fax. +61 2 9704 8139 austria: computerstr. 6, a-1101 wien, p.o. box 213, tel. +43 1 60 101 1248, fax. +43 1 60 101 1210 belarus: hotel minsk business center, bld. 3, r. 1211, volodarski str. 6, 220050 minsk, tel. +375 172 20 0733, fax. +375 172 20 0773 belgium: see the netherlands brazil: see south america bulgaria: philips bulgaria ltd., energoproject, 15th floor, 51 james bourchier blvd., 1407 sofia, tel. +359 2 68 9211, fax. +359 2 68 9102 canada: philips semiconductors/components, tel. +1 800 234 7381, fax. +1 800 943 0087 china/hong kong: 501 hong kong industrial technology centre, 72 tat chee avenue, kowloon tong, hong kong, tel. +852 2319 7888, fax. +852 2319 7700 colombia: see south america czech republic: see austria denmark: sydhavnsgade 23, 1780 copenhagen v, tel. +45 33 29 3333, fax. +45 33 29 3905 finland: sinikalliontie 3, fin-02630 espoo, tel. +358 9 615 800, fax. +358 9 6158 0920 france: 51 rue carnot, bp317, 92156 suresnes cedex, tel. +33 1 4099 6161, fax. +33 1 4099 6427 germany: hammerbrookstra?e 69, d-20097 hamburg, tel. +49 40 2353 60, fax. +49 40 2353 6300 hungary: see austria india: philips india ltd, band box building, 2nd floor, 254-d, dr. annie besant road, worli, mumbai 400 025, tel. +91 22 493 8541, fax. +91 22 493 0966 indonesia: pt philips development corporation, semiconductors division, gedung philips, jl. buncit raya kav.99-100, jakarta 12510, tel. +62 21 794 0040 ext. 2501, fax. +62 21 794 0080 ireland: newstead, clonskeagh, dublin 14, tel. +353 1 7640 000, fax. +353 1 7640 200 israel: rapac electronics, 7 kehilat saloniki st, po box 18053, tel aviv 61180, tel. +972 3 645 0444, fax. +972 3 649 1007 italy: philips semiconductors, via casati, 23 - 20052 monza (mi), tel. +39 039 203 6838, fax +39 039 203 6800 japan: philips bldg 13-37, kohnan 2-chome, minato-ku, tokyo 108-8507, tel. +81 3 3740 5130, fax. +81 3 3740 5057 korea: philips house, 260-199 itaewon-dong, yongsan-ku, seoul, tel. +82 2 709 1412, fax. +82 2 709 1415 malaysia: no. 76 jalan universiti, 46200 petaling jaya, selangor, tel. +60 3 750 5214, fax. +60 3 757 4880 mexico: 5900 gateway east, suite 200, el paso, texas 79905, tel. +9-5 800 234 7381, fax +9-5 800 943 0087 middle east: see italy netherlands: postbus 90050, 5600 pb eindhoven, bldg. vb, tel. +31 40 27 82785, fax. +31 40 27 88399 new zealand: 2 wagener place, c.p.o. box 1041, auckland, tel. +64 9 849 4160, fax. +64 9 849 7811 norway: box 1, manglerud 0612, oslo, tel. +47 22 74 8000, fax. +47 22 74 8341 pakistan: see singapore philippines: philips semiconductors philippines inc., 106 valero st. salcedo village, p.o. box 2108 mcc, makati, metro manila, tel. +63 2 816 6380, fax. +63 2 817 3474 poland : al.jerozolimskie 195 b, 02-222 warsaw, tel. +48 22 5710 000, fax. +48 22 5710 001 portugal: see spain romania: see italy russia: philips russia, ul. usatcheva 35a, 119048 moscow, tel. +7 095 755 6918, fax. +7 095 755 6919 singapore: lorong 1, toa payoh, singapore 319762, tel. +65 350 2538, fax. +65 251 6500 slovakia: see austria slovenia: see italy south africa: s.a. philips pty ltd., 195-215 main road martindale, 2092 johannesburg, p.o. box 58088 newville 2114, tel. +27 11 471 5401, fax. +27 11 471 5398 south america: al. vicente pinzon, 173, 6th floor, 04547-130 s?o paulo, sp, brazil, tel. +55 11 821 2333, fax. +55 11 821 2382 spain: balmes 22, 08007 barcelona, tel. +34 93 301 6312, fax. +34 93 301 4107 sweden: kottbygatan 7, akalla, s-16485 stockholm, tel. +46 8 5985 2000, fax. +46 8 5985 2745 switzerland: allmendstrasse 140, ch-8027 zrich, tel. +41 1 488 2741 fax. +41 1 488 3263 taiwan: philips semiconductors, 6f, no. 96, chien kuo n. rd., sec. 1, taipei, taiwan tel. +886 2 2134 2886, fax. +886 2 2134 2874 thailand: philips electronics (thailand) ltd., 209/2 sanpavuth-bangna road prakanong, bangkok 10260, tel. +66 2 745 4090, fax. +66 2 398 0793 turkey: yukari dudullu, org. san. blg., 2.cad. nr. 28 81260 umraniye, istanbul, tel. +90 216 522 1500, fax. +90 216 522 1813 ukraine : philips ukraine, 4 patrice lumumba str., building b, floor 7, 252042 kiev, tel. +380 44 264 2776, fax. +380 44 268 0461 united kingdom: philips semiconductors ltd., 276 bath road, hayes, middlesex ub3 5bx, tel. +44 208 730 5000, fax. +44 208 754 8421 united states: 811 east arques avenue, sunnyvale, ca 94088-3409, tel. +1 800 234 7381, fax. +1 800 943 0087 uruguay: see south america vietnam: see singapore yugoslavia: philips, trg n. pasica 5/v, 11000 beograd, tel. +381 11 62 5344, fax.+381 11 63 5777 printed in the netherlands 545004/25/04/pp 24 date of release: 1999 dec 14 document order number: 9397 750 06555

▲Up To Search▲

Price & Availability of TDA8050

	To Download TDA8050 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .